A track/hold circuit is used in the former stage of an analog/digital converter (hereinafter referred to as A/D converter) etc. to track and hold input analog voltage. Generally, such a track/hold circuit has a buffer circuit to drive an input capacitor of the A/D converter arranged in the latter stage. Particularly, this buffer circuit requires high bias current to secure sufficient track speed for high-speed operation, namely a sufficient band.
On the other hand, required is a high-speed track/hold circuit with low power consumption. It is known, as a structure of such a high-speed track/hold circuit with low power consumption, to provide a phase to reset the input terminal of the buffer before performing tracking process. By employing this structure, restrictions on the track speed depending on bias current can be removed.
However, in order to sufficiently reset output voltage in a limited reset phase period, bias current depending on the period is required in the above technique. That is, higher bias current is required as the period becomes shorter. Accordingly, there is a problem that power consumption cannot be reduced effectively.